Current Events

Webinar Intelligent IP for automated A/MS IC design and technology porting

Learn how our solution on analog automation can support your IC design flow to meet tapeouts in time. Whether your design phase is to be accelerated, design migration eased, or your recurring tasks to be automated – with intelligent IPs, Fraunhofer IIS/EAS offers an applied solution for a new era of analog integrated circuit design with shorter development times for analog / mixed-signal products. 

Registration and website.

Back to Overview